Enterprise storage architectures may use a battery backed nonvolatile random access memory (NVRAM) or nonvolatile dual in-line memory module (NVDIMM) device for logging incoming write input/output requests (IO requests). The IO requests my eventually be flushed to lower performance nonvolative data storage media. NVRAM/NVDIMM solutions may be used as a staging area to reduce write latency. However, such solutions may have limited functionality due to having small capacity, increased complexity (e.g., related to central processing unit (CPU) asynchronous dynamic random access memory (DRAM) refresh (ADR) synchronization), and the need to include a battery in the system. Moreover, the performance of such a system may be limited by the number of NVRAMs and/or NVDIMMs that a system can include, and in some applications, the inclusion of batteries may be unacceptable, due to system environment constraints, rendering a battery backed solution unworkable.
Further complicating the use of battery backed NVRAM or NVDIMM is the possible need to size the NVDIMMs and/or NVRAMs to trade off cost against high write latency jitter. Thus, there is a need for an improved alternative to a storage system including battery backed NVRAM or NVDIMM.